The R5F100GA opens the 48-pin row of the RL78/G13 family with the entry
memory configuration: 16 KB of code flash, 2 KB of RAM, the 4 KB data
flash, ten converter channels and forty-four I/O in a 7 by 7 mm LFQFP on a
0.5 mm pitch, with an HWQFN option on the same pin count. It is the largest
package the family offers for its smallest memory, built for boards whose
I/O and analog spread outran their program size, and it shares the whole
protection architecture of the line unchanged.

A 48-pin package with a 16 KB image

Sixteen kilobytes divides into sixteen one-kilobyte blocks, four forming
the boot cluster with the swap mirror at 02000H. At this capacity most
images skip the swap feature and the mirrored option bytes at 010C0H are
erased, which the passive read of block 0 shows immediately. The ten
converter channels and forty-four I/O are the row’s signature, and on such
boards the control law is usually compact while the pin work is heavy:
relay banks, indicator stacks and a wide sensor front end.

Ten channels across a wide board

The converter’s ten inputs carry the sensor spread, with calibration in
the 4 KB data flash and thresholds in code. On I/O-heavy boards the data
array also holds the configuration records that make the pin map
meaningful, and recovering it alongside the code is what lets a cloned
controller drive the original board correctly rather than partially.

The 2 KB budget and ROM-resident updates

With 2 KB of volatile memory the flash library stays ROM-resident and the
application halts during any erase or write, so field updates here are
short and surgical, leaving an option-block state and a data-flash
counter as their only trace. Readout needs no library at all, and the
0.5 mm LFQFP, while finer than the 44-pin row’s 0.8 mm, is still
ordinary fixture work rather than a specialist exercise. Both facts
shape the session plan, and both are settled before the first block is
read, which is why the option area comes first on every job here.

Protection posture as shipped

As shipped, the boot-area guard is on, the debug gate and its
erase-on-failure bit wait in the fourth option byte, and the two
ten-byte identifiers sit beside the vectors in the first block, usually
blank or half-written. A passive read of that block, before any tool
attaches, shows which of the half-configured states this board is in,
and that state decides the opening move.

Access and the bench

The LFQFP’s 0.5 mm leads take a fixture directly, and the HWQFN option
trades them for a thermal pad, pushing work toward lift-and-reball.
Either way the part returns to service, the IC decapsulation service route covers
the silicon-level exceptions, and the firmware extraction service page describes the
streaming workflow.

Row context

The 48-pin row continues from R5F100GC locked flash through R5F100GL firmware decryption. The
16 KB die also appears as the 20-pin R5F1006A flash memory, 24-pin
R5F1007A memory readout, 30-pin R5F100AA flash data, 32-pin R5F100BA locked flash, 36-ball
R5F100CA flash memory, 40-pin R5F100EA program memory and 44-pin R5F100FA memory readout
versions, and the family service entry is the microcontroller unlock service page.

Forty-eight pins, two package choices

The row’s widest package comes as a 0.5 mm-pitch LFQFP and as an
HWQFN with a thermal pad, and the choice the board designer made
shapes the bench plan. The leaded body takes a fixture directly;
the QFN trades leads for pad contact and pushes work toward
lift-and-reball. Either way the part presents ten converter inputs,
forty-four I/O and seven external interrupts, with the security
architecture unchanged from the smallest member. Sixteen kilobytes
of program and 2 KB of volatile memory place this member at the
entry of the 48-pin row, and its captures are correspondingly
quick.

Package choice also decides failure modes: the leaded member survives a clumsy probe that the QFN would turn into a reball session, and boards built on the leaded version tend to expose their test points for the same reason they chose the package. Planning the session around those test points first, before any lead is touched, is the local habit that saves the most time.