Unlock Microchip MCU PIC16F526 Protected Archive

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When setting up a Synchronous Master Reception:
1 Initialize the SPBRG register for the appropriate baud rate (Section 11.1 “USART Baud Rate Generator (BRG)”).
Enable the synchronous master serial port by setting bits SYNC, SPEN and CSRC. Ensure bits CREN and SREN are clear. If interrupts are desired, then set enable bit RCIE.
If 9-bit reception is desired, then set bit RX9. If a single reception is required, set bit SREN. For continuous reception, set bit CREN. Interrupt flag bit RCIF will be set when reception is complete and an interrupt will be generated if enable bit RCIE was set.
Read the RCSTA register to get the ninth bit (if enabled) and determine if any error occurred during reception. Read the 8-bit received data by reading the RCREG register from Unlock Microchip MCU PIC16F526 Protected Archive.
If any error occurred, clear the error by clearing bit CREN.
If using interrupts, ensure that GIE and PEIE (bits 7 and 6) of the INTCON register are set.
Synchronous Slave mode differs from the Master mode in the fact that the shift clock is supplied externally at the RC6/TX/CK/SCK/SCL/SEG9 pin (instead of being supplied internally in Master mode). This allows the device to transfer or receive data while in Sleep mode.
Slave mode is entered by clearing bit, CSRC (TXSTA<7>).
The operation of the Synchronous Master and Slave modes is identical, except in the case of the Sleep mode. If two words are written to the TXREG and then the SLEEP instruction is executed, the following will occur:

The first word will immediately transfer to the TSR register and transmit.
The second word will remain in TXREG register. Flag bit TXIF will not be set. When the first word has been shifted out of TSR, the TXREG register will transfer the second word to the TSR and flag bit TXIF will now be set after Unlock Microchip MCU PIC16F526 Protected Archive.

If enable bit TXIE is set, the interrupt will wake the chip from Sleep and if the global interrupt is enabled, the program will branch to the interrupt vector (0004h) after CRACK MCU.