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FEATURES

• · 80C51 Central Processing Unit

– 4 kbytes ROM/EPROM (P80/P87C51X2)

– 8 kbytes ROM/EPROM (P80/P87C52X2)

– 16 kbytes ROM/EPROM (P80/P87C54X2)

– 32 kbytes ROM/EPROM (P80/P87C58X2)

– 128 byte RAM (P80/P87C51X2 and P80C31X2)

– 256 byte RAM (P80/P87C52/54X2/58X2 and P80C32X2)

– Boolean processor

– Fully static operation

Crack MCU IC P87C51X2BBD

– Low voltage (2.7 V to 5.5 V at 16 MHz) operation

• · 12-clock operation with selectable 6-clock operation (via software or via parallel programmer)

• · Memory addressing capability

– Up to 64 kbytes ROM and 64 kbytes RAM

• · Power control modes:

– Clock can be stopped and resumed

– Idle mode

– Power-down mode

• · CMOS and TTL compatible
• · Two speed ranges at VCC = 5 V

– 0 to 30 MHz with 6-clock operation

– 0 to 33 MHz with 12-clock operation

• · PLCC, DIP, TSSOP or LQFP packages
• · Extended temperature ranges
• · Dual Data Pointers
• · Security bits:

– ROM (2 bits)

– OTP (3 bits)

• · Encryption array – 64 bytes
• · Four interrupt priority levels
• · Six interrupt sources
• · Four 8-bit I/O ports
• · Full-duplex enhanced UART

– Framing error detection

– Automatic address recognition

• · Three 16-bit timers/counters T0, T1 (standard 80C51) and additional T2 (capture and compare)

• · Programmable clock-out pin
• · Asynchronous port reset
• · Low EMI (inhibit ALE, slew rate controlled outputs, and 6-clock mode)

• · Wake-up from Power Down by an external interrupt.