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Unlocking microcontroller PIC16F59 heximal

We can unlocking microcontroller PIC16F59 heximal, please view the microcontroller PIC16F59 heximal features for your reference:
The operation of the Synchronous Master and Slave modes are identical (see Section 12.4.1.3 “Synchronous Master Transmission”), except in the case of the Sleep mode.
If two words are written to the TXREG and then the SLEEP instruction is executed, the following will occur:
The first character will immediately transfer to the TSR register and transmit. The second word will remain in TXREG register. The TXIF bit will not be set.

After the first character has been shifted out of TSR, the TXREG register will transfer the second character to the TSR and the TXIF bit will now be set.

5. If the PEIE and TXIE bits are set, the interrupt will wake the device from Sleep and execute the next instruction. If the GIE bit is also set, the heximal will call the interrupt service routine before unlocking microcontroller heximal.
The operation of the Synchronous Master and Slave modes is identical (Section 12.4.1.5 “Synchronous Master Reception”), with the following exceptions when Unlocking Microcontroller PIC16F59 Heximal
CREN bit is always set, therefore the receiver is never Idle SREN bit, which is a “don’t care” in Slave mode

A character may be received while in Sleep mode by setting the CREN bit prior to entering Sleep. Once the word is received, the RSR register will transfer the data to the RCREG register when unlocking microcontroller heximal.
If the RCIE enable bit is set, the interrupt generated will wake the device from Sleep and execute the next instruction. If the GIE bit is also set, the heximal will branch to the interrupt vector.

Set the SYNC and SPEN bits and clear the CSRC bit.
If using interrupts, ensure that the GIE and PEIE bits of the INTCON register are set and set the RCIE bit.
If 9-bit reception is desired, set the RX9 bit. Set the CREN bit to enable reception. The RCIF bit will be set when reception is complete. An interrupt will be generated if the RCIE bit was set before Unlocking Microcontroller PIC16F59 Heximal.
If 9-bit mode is enabled, retrieve the Most Significant bit from the RX9D bit of the RCSTA register. Retrieve the 8 Least Significant bits from the receive FIFO by reading the RCREG register.
If an overrun error occurs, clear the error by either clearing the CREN bit of the RCSTA register or by clearing the SPEN bit which resets the EUSART after UNLOCK microcontroller.