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Unlock Microcontroller ATmega640 encrypted memory system and decode the Firmware out from flash and eeprom, then copy the program into the blank MCU ATmega640 which will provide the same functions;

Unlock Microcontroller ATmega640 encrypted memory system and decode the Firmware out from flash and eeprom, then copy the program into the blank MCU ATmega640 which will provide the same functions;

The ATmega640 provides the following features: 1K bytes of Flash, 64 bytes EEPROM, up to six general-purpose I/O lines, 32 general-purpose working registers, an 8-bit timer/counter. Internal and external interrupts, programmable Watchdog Timer with internal oscillator, and two software-selectable power-saving modes.

The Idle Mode stops the CPU while allowing the timer/counters and interrupt system to continue functioning. The Power-down Mode saves the register contents but freezes the oscillator, disabling all other chip functions until the next interrupt or hardware reset.

The wake-up or interrupt on pin change features enable the ATtiny12 to be highly responsive to external events, still featuring the lowest power consumption while in the power-down modes. The device is manufactured using Atmel’s high-density nonvolatile memory technology. By combining an RISC 8-bit CPU with Flash on a monolithic chip.

The Atmel ATmega640 is a powerful microcontroller that provides a highly-flexible and cost-effective solution to many embedded control applications which has been faciliated for the Microcontroller code copying. The ATmega640 AVR is supported with a full suite of program and system development tools including: macro assemblers, program debugger/simulators, in-circuit emulators, and evaluation kits.

Port B is a 6-bit I/O port. PB4..0 are I/O pins that can provide internal pull-ups (selected for each bit). On ATtiny11, PB5 is input only. On ATmega640, PB5 is input or open-drain output.

The port pins are tri-stated when a reset condition becomes active, even if the clock is not running. The use of pins PB5..3 as input or I/O pins is limited, depending on reset and clock settings.

Reset input. An external reset is generated by a low level on the RESET pin. Reset pulses longer than 50 ns will generate a reset, even if the clock is not running. Shorter pulses are not guaranteed to generate a reset.