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Unlock MCU ATmega644 Firmware from memory include flash and eeprom, then copy the code and data to blank Microcontroller which will provide the same functions;

Unlock MCU ATmega644 Firmware

· Bit 7 – CTC1: Clear Timer/Counter on Compare Match

When the CTC1 control bit is set (one), Timer/Counter1 is reset to $00 in the CPU clock cycle after a compare match with OCR1A register value. If the control bit is cleared, Timer/Counter1 continues counting and is unaffected by a compare match.

· Bit 6 – PWM1: Pulse Width Modulator Enable

When set (one), this bit enables PWM mode for Timer/Counter1. This mode is described on page 31.

· Bits 5,4 – COM1A1, COM1A0: Compare Output Mode, Bits 1 and 0

The COM1A1 and COM1A0 control bits determine any output pin action following a compare match A in Timer/Counter1. Output pin actions affect pin PB1(OC1A).

Since this is an alternative function to an I/O port, the corresponding direction control bit must be set (one) to control an output pin. The control configuration is shown in Table 10.

Timer/Counter1 is implemented as an up-counter with read and write access. Due to synchronization of the CPU and Timer/Counter1, data written into Timer/Counter1 is delayed by one CPU clock cycle.