Read IC PIC18F242 Software

We can Read IC PIC18F242 Software, please view the IC PIC18F242 features for your reference:


High Performance RISC CPU:

· C compiler optimized architecture/instruction set

– Source code compatible with the PIC16 and PIC17 instruction sets

· Linear program memory addressing to 32 Kbytes when Read IC

· Linear data memory addressing to 1.5 Kbytes

· Up to 10 MIPs operation:

– DC – 40 MHz osc./clock input

– 4 MHz – 10 MHz osc./clock input with PLL active if Read IC

· 16-bit wide instructions, 8-bit wide data path

· Priority levels for interrupts

· 8 x 8 Single Cycle Hardware Multiplier

Peripheral Features:

· High current sink/source 25 mA/25 mA

· Three external interrupt pins after Read IC

· Timer0 module: 8-bit/16-bit timer/counter with

8-bit programmable prescaler

· Timer1 module: 16-bit timer/counter

· Timer2 module: 8-bit timer/counter with 8-bit period register (time-base for PWM) when Read IC 

· Timer3 module: 16-bit timer/counter

· Secondary oscillator clock option – Timer1/Timer3

· Two Capture/Compare/PWM (CCP) modules. CCP pins that can be configured as:

– Capture input: capture is 16-bit, max. resolution 6.25 ns (TCY/16)

– Compare is 16-bit, max. resolution 100 ns (TCY) if Read IC

– PWM output: PWM resolution is 1- to 10-bit, max. PWM freq. @: 8-bit resolution = 156 kHz 10-bit resolution = 39 kHz

· Master Synchronous Serial Port (MSSP) module,

Two modes of operation:

– 3-wire SPI™ (supports all 4 SPI modes)

– I2C™ Master and Slave mode before Read IC

Peripheral Features (Continued):

· Addressable USART module:

– Supports RS-485 and RS-232

· Parallel Slave Port (PSP) module

Analog Features:

· Compatible 10-bit Analog-to-Digital Converter module (A/D) with Read IC:

– Fast sampling rate

– Conversion available during SLEEP

– Linearity ≤ 1 LSb

· Programmable Low Voltage Detection (PLVD)

– Supports interrupt on-Low Voltage Detection

· Programmable Brown-out Reset (BOR) after Read IC

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