Extract IC PIC18F2423 Code

We can Extract IC PIC18F2423 Code, please view the IC PIC18F2423 features for your reference:

Peripheral Highlights:

· 12-bit, up to 13-channel Analog-to-Digital Converter module (A/D):

– Auto-acquisition capability

– Conversion available during Sleep

· Dual analog comparators with input multiplexing

· High-current sink/source 25 mA/25 mA

· Three programmable external interrupts when Extract IC

· Four input change interrupts

· Up to 2 Capture/Compare/PWM (CCP) modules, one with Auto-Shutdown (28-pin devices)

· Enhanced Capture/Compare/PWM (ECCP) module (40/44-pin devices only):

– One, two or four PWM outputs

– Selectable polarity

– Programmable dead time if Extract IC

– Auto-shutdown and auto-restart

· Master Synchronous Serial Port (MSSP) module supporting 3-wire SPI (all 4 modes) and I2C™

Master and Slave modes

· Enhanced USART module:

– Supports RS-485, RS-232 and LIN 1.2

– RS-232 operation using internal oscillator block (no external crystal required)

– Auto-wake-up on Start bit before Extract IC

– Auto-Baud Detect

Run: CPU on, peripherals on

Idle: CPU off, peripherals on

Sleep: CPU off, peripherals off

Idle mode currents down to 5.8 ìA, typical

Sleep mode current down to 0.1 ìA, typical

Timer1 Oscillator: 1.8 ìA, 32 kHz, 2V

Watchdog Timer: 2.1 ìA after Extract IC

Two-Speed Oscillator Start-up

Flexible Oscillator Structure:

· Four Crystal modes, up to 25 MHz

· 4x Phase Lock Loop (available for crystal and internal oscillators)

· Two External RC modes, up to 4 MHz

· Two External Clock modes, up to 25 MHz

· Internal oscillator block:

– 8 user-selectable frequencies, from 31 kHz to 8 MHz if Extract IC

– Provides a complete range of clock speeds from 31 kHz to 32 MHz when used with PLL

– User-tunable to compensate for frequency drift

· Secondary oscillator using Timer1 @ 32 kHz

· Fail-Safe Clock Monitor:

– Allows for safe shutdown if external clock stops

· C compiler optimized architecture:

– Optional extended instruction set designed to optimize re-entrant code when Extract IC

· 100,000 erase/write cycle Enhanced Flash program memory typical

· 1,000,000 erase/write cycle Data EEPROM memory typical

· Flash/Data EEPROM Retention: 100 years typical

· Self-programmable under software control

· Priority levels for interrupts

· 8 x 8 Single-Cycle Hardware Multiplier

· Extended Watchdog Timer (WDT):

– Programmable period from 4 ms to 131s before Extract IC

· Single-Supply In-Circuit Serial Programming™ (ICSP™) via two pins

· In-Circuit Debug (ICD) via two pins

· Operating voltage range: 2.0V to 5.5V

· Programmable 16-level High/Low-Voltage Detection (HLVD) module:

– Supports interrupt on High/Low-Voltage Detection

· Programmable Brown-out Reset (BOR):

– With software enable option after Extract IC

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