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Extract CPLD IC XILINX XC95144-10TQ100C
Extract CPLD IC XILINX XC95144-10TQ100C
We can Extract CPLD IC XILINX XC95144-10TQ100C, below its the features for your reference:
High-performance
– 5 ns pin-to-pin logic delays on all pins, Supports parallel programming of multiple XC9500 devices
-fCNT to 125 MHz
Large density range
36 to 288 macrocells with 800 to 6,400 usable gates
5V in-system programmable
Endurance of 10,000 program/erase cycles
Program/erase over full commercial voltage and temperature range
Enhanced pin-locking architecture
Flexible 36V18 Function Block
90 product terms drive any or all of 18 macrocells within Function Block
Global and product term clocks, output enables, set and reset signals
Extensive IEEE Std 1149.1 boundary-scan (JTAG) support
Programmable power reduction mode in each macrocell
Slew rate control on individual outputs
User programmable ground pin capability
Extended pattern security features for design protection
High-drive 24 mA outputs
3.3V or 5V I/O capability
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