Crack Chip DSPIC30F2010 Firmware

We can Crack Chip DSPIC30F2010 Firmware, please view the Chip DSPIC30F2010 features for your reference:


High-Performance Modified RISC CPU:

· Modified Harvard architecture

· C compiler optimized instruction set architecture

· 83 base instructions with flexible addressing modes when Crack Chip

· 24-bit wide instructions, 16-bit wide data path

· 12 Kbytes on-chip Flash program space

· 512 bytes on-chip data RAM

· 1 Kbyte nonvolatile data EEPROM

· 16 x 16-bit working register array if Crack Chip

· Up to 30 MIPs operation:

– DC to 40 MHz external clock input

– 4 MHz-10 MHz oscillator input with PLL active (4x, 8x, 16x)

· 27 interrupt sources

· Three external interrupt sources before Crack Chip

· Eight user-selectable priority levels for each interrupt

· Four processor exceptions and software traps

DSP Engine Features:

· Modulo and Bit-Reversed modes after Crack Chip

· Two 40-bit wide accumulators with optional saturation logic

· 17-bit x 17-bit single-cycle hardware fractional/integer multiplier

· Single-cycle Multiply-Accumulate (MAC) operation if Crack Chip

· 40-stage Barrel Shifter

· Dual data fetch

· High current sink/source I/O pins: 25 mA/25 mA

· Three 16-bit timers/counters; optionally pair up 16-bit timers into 32-bit timer modules

· Four 16-bit capture input functions when Crack Chip

· Two 16-bit compare/PWM output functions

– Dual Compare mode available

· 3-wire SPI modules (supports 4 Frame modes)

· I2CTM module supports Multi-Master/Slave mode and 7-bit/10-bit addressing

· Addressable UART modules with FIFO buffers before Crack Chip

Motor Control PWM Module Features:

· Six PWM output channels

– Complementary or Independent Output modes

– Edge and Center-Aligned modes

· Four duty cycle generators

· Dedicated time base with four modes

· Programmable output polarity after Crack Chip

· Dead-time control for Complementary mode

· Manual output control

· Trigger for synchronized A/D conversions

Quadrature Encoder Interface Module Features:

Phase A, Phase B and Index Pulse input 16-bit up/down position counter

Count direction status

Position Measurement (x2 and x4) mode

Programmable digital noise filters on inputs

Alternate 16-bit Timer/Counter mode

Interrupt on position counter rollover/underflow

Analog Features:

· 10-bit Analog-to-Digital Converter (ADC) with:

– 1 Msps (for 10-bit A/D) conversion rate

– Six input channels

– Conversion available during Sleep and Idle when Crack Chip

· Programmable Brown-out Reset

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